Labs
Electronic and Genetic Design Automation
| Lab | Video | Description | Faculty |
| Laboratory for NanoIntegrated Systems (LNIS) | ▶️ | Development of reconfigurable logic architectures and digital circuits | Pierre-Emmanuel Gaillardon |
| Kalla Lab | ▶️ | Automated Synthesis, Test and Verification of Digital Systems | Priyank Kalla |
| CMOS Lab | ▶️ | Engineering Design | Ken Stevens |
VLSI System Design
| Lab | Video | Description | Faculty |
| – | Computer architecture and VLSI systems | Erik Brunvand | |
| Laboratory for NanoIntegrated Systems (LNIS) | ▶️ | Development of reconfigurable logic architectures and digital circuits | Pierre-Emmanuel Gaillardon |
| CMOS Lab | ▶️ | Very Large Scale Integration (VLSI) | Ken Stevens |
| Laboratory of Circuits & Systems (LCAS) | ▶️ | Very wide band communication circuits and systems | Armin Tajalli |
Faculty
Erik Brunvand
Adjunct Professor
University of Utah School of Computing
- Phone: 801-581-4345
- Email: elb@cs.utah.edu
- Office: MEB 3142
Computer architecture and VLSI
Morteza Fayazi
Assistant Professor
- Phone: 801-585-9906
- Email: m.fayazi@utah.edu
- Office: MEB 2124
- Website: Prof. Fayazi’s Profile
Electronic Design Automation (EDA), application of Machine Learning (ML) on RF/analog/mixed-signal circuit design, System-on-Chip (SoC) design, Artificial Intelligence (AI), analog circuit design, digital circuit design, data retrieval.
Pierre-Emmanuel Gaillardon
Associate Chair, Professor
- Phone: 801-585-3422
- Email: pierre-emmanuel.gaillardon@utah.edu
- Office: SMBB 3745
- Website: Prof. Gaillardon's Profile
Development of reconfigurable logic architectures and digital circuits exploiting emerging device technologies and novel EDA techniques.
Priyank Kalla
Professor
- Phone: 801-587-7617
- Email: kalla@ece.utah.edu
- Office: MEB 2260
- Website: Prof. Kalla's Profile
VLSI systems: automated synthesis and optimization, validation and verification of digital VLSI systems, including: formal verification of RTL descriptions, new techniques to guide CNF-SAT search, using Groebner's proof systems for simplification of design verification and SAT solving, and design automation for optic/photonic logic
Ken Stevens
Professor
- Phone: 801-585-9176
- Email: kstevens@ece.utah.edu
- Office: MEB 2254
VLSI, asynchronous circuit design and architecture, timing analysis, and formal verification
Armin Tajalli
Associate Professor
- Phone: 801-581-4840
- Email: armin.tajalli@utah.edu
- Office: MEB 2224
- Website: Prof. Tajalli's Profile
Integrated wireline and wireless systems, energy-efficient integrated systems, high-speed wireline systems, RF circuits, data converters, phase-locked loops and frequency synthesisers, analog integrated circuits, extremely low power integrated systems