COMPUTER ENGINEERING& DIGITAL SYSTEMS
Labs
- Digital Complementary Metal-Oxide-Semiconductor (CMOS) Very Large Scale Integration (VLSI)
- Performance validations and CAD for multi-GHz circuits
- Relative Timing Verification pulselogic
- Asychronous Circuits and Systems
- Communication Networks and Synchronization
Automated synthesis and optimization, validation and verification of digital VLSI systems, including:
- formal verification of RTL descriptions,
- new techniques to guide CNF-SAT search
- using Groebner’s proof systems for simplification of design verification and SAT solving
- design automation for optic/photonic logic
- VLSI System Design
- Electronic and Genetic Design Automation
- Development of reconfigurable logic architectures and digital circuits
- Exploiting emerging device technologies and novel EDA techniques
The main research focus of our team is to develop advance integrated circuits & systems for high-performance and energy-efficient Communication & Computing systems. We are trying to find efficient topological representations of advanced Communication, Signal Processing, and Coding schemes. Our research interests include broadband data communication, wireless transceivers, wide-band phase-locked loops and synthesizers, data converters, and energy efficient integrated circuits.We encourage you to get in touch with us if you have a strong background on design of Integrated Circuits, as well as a solid knowledge on theoretical subjects such as Signal Processing, Communications, and System Modeling
- Electronic Design Automation (EDA)
- Application of Machine Learning (ML) on RF/analog/mixed-signal circuit design
- System-on-Chip (SoC) design
- Artificial Intelligence
- Analog & digital circuit design
- Data retrieval
The Sensing, People, and Networks (SPAN) Lab conducts research on two topics: wireless networking, and the equity of engineered and automated sensing and decision systems. We have a history of augmenting the reliability, efficiency, and capabilities of networks using the radio as a sensing interface in addition to the communication interface. We also investigate how sensing and other “big data” systems and algorithms that affect the resources people are allocated can have both positive and negative effects on equity in society. Students in the SPAN Lab study wireless networking, statistical signal processing, and power and inequity, and these tools enable us to study the interaction of people, networks, and sensing systems in new ways that will lead to greater privacy, reliability, and equity of engineered systems.
Faculty
Morteza Fayazi
Assistant Professor
- Phone: 801-585-9906
- Email: m.fayazi@utah.edu
- Office: MEB 2124
- Website: https://profiles.faculty.utah.edu/u6061288
Electronic Design Automation (EDA), application of Machine Learning (ML) on RF/analog/mixed-signal circuit design, System-on-Chip (SoC) design, Artificial Intelligence (AI), analog circuit design, digital circuit design, data retrieval.
Pierre-Emmanuel Gaillardon
Associate Chair, Professor
- Phone: 801-585-3422
- Email: pierre-emmanuel.gaillardon@utah.edu
- Office: SMBB 3745
Development of reconfigurable logic architectures and digital circuits exploiting emerging device technologies and novel EDA techniques.
Priyank Kalla
Professor
- Phone: 801-587-7617
- Email: kalla@ece.utah.edu
- Office: MEB 4112
- Website: https://my.ece.utah.edu/~kalla/
VLSI systems: automated synthesis and optimization, validation and verification of digital VLSI systems, including: formal verification of RTL descriptions, new techniques to guide CNF-SAT search, using Groebner's proof systems for simplification of design verification and SAT solving, and design automation for optic/photonic logic
Neal Patwari
Professor
- Phone: 801-581-8282
- Email: neal.patwari@utah.edu
- Office: MEB 2126
- Website: https://patwarilab.com/
Wireless technologies which improve the security, reliability, and sensing capabilities of future generation networks; and equitable design of automated/AI decision systems.
Ken Stevens
Professor
- Phone: 801-585-9176
- Email: kstevens@ece.utah.edu
- Office: MEB 2254
VLSI, asynchronous circuit design and architecture, timing analysis, and formal verification
Armin Tajalli
Associate Professor
- Phone: 801-581-4840
- Email: armin.tajalli@utah.edu
- Office: MEB 2224
Integrated wireline and wireless systems, energy-efficient integrated systems, high-speed wireline systems, RF circuits, data converters, phase-locked loops and frequency synthesisers, analog integrated circuits, extremely low power integrated systems